…but what does it means for Intel Linux Graphics?
I tried to summarize all the patches and changes which went to this kernel release which somehow affected the drivers/gpu/drm/i915 directory (and, therefore, the kernel part of our driver).
To give proper credit to all the authors whose code was accepted into the official kernel between the 3.0.0 and 3.1 release, here is the full list:
- Adam Jackson: drm/i915/dp: Better hexdump of DPCD
- Adam Jackson: drm/i915/dp: Don’t turn CPT DP ports on too early
- Adam Jackson: drm/i915/dp: Explicitly disable symbol scrambling while training
- Adam Jackson: drm/i915/dp: Explicitly request 8/10 channel coding
- Adam Jackson: drm/i915/dp: Move DPCD dump to common code instead of PCH-only
- Adam Jackson: drm/i915/dp: Read more DPCD registers on connection probe
- Adam Jackson: drm/i915/dp: Retry DPCD fetch on G4X too
- Adam Jackson: drm/i915/dp: Zero the DPCD data before connection probe
- Adam Jackson: drm/i915/pch: Fix integer math bugs in panel fitting
- Adam Jackson: drm/i915/pch: Save/restore PCH_PORT_HOTPLUG across suspend
- Ben Widawsky: drm/i915: add module parameter compiler hints
- Ben Widawsky: drm/i915: hangcheck disable parameter
- Ben Widawsky: drm/i915: provide module parameter description
- Chris Wilson: drm/i915: Add an interface to dynamically change the cache level
- Chris Wilson: drm/i915/bios: Avoid temporary allocation whilst searching for downclock
- Chris Wilson: drm/i915: Cache GT fifo count for SandyBridge
- Chris Wilson: drm/i915: Combine pinning with setting to the display plane
- Chris Wilson: drm/i915: Disable FBC across page-flipping
- Chris Wilson: drm/i915/gtt: Split out i915_gem_gtt_rebind_object()
- Chris Wilson: drm/i915: Introduce i915_gem_object_finish_gpu()
- Chris Wilson: drm/i915: Introduce i915_gem_object_finish_gtt()
- Chris Wilson: drm/i915: Mark the cursor and the overlay as being part of the display planes
- Chris Wilson: drm/i915: Only export the generic intel_disable_fbc() interface
- Chris Wilson: drm/i915: Perform intel_enable_fbc() from a delayed task
- Chris Wilson: drm/i915: Remove vestigial pitch from post-gen2 FBC control routines
- Chris Wilson: drm/i915: Replace direct calls to vfunc.disable_fbc with intel_disable_fbc()
- Chris Wilson: drm/i915: Set persistent-mode for ILK/SNB framebuffer compression
- Chris Wilson: drm/i915: Share the common work of disabling active FBC before updating
- Chris Wilson: drm/i915: Use of a CPU fence is mandatory to update FBC regions upon CPU writes
- Dave Airlie: Revert “drm/i915: Try enabling RC6 by default (again)”
- Eric Anholt: drm/i915: Use the LLC mode on gen6 for everything but display.
- Eric Anholt: drm/i915: Use the uncached domain for the display planes
- Hugh Dickins: drm/i915: more struct_mutex locking
- Jesse Barnes: drm/i915: add GPU max frequency control file
- Jesse Barnes: drm/i915: allow cache sharing policy control
- Jesse Barnes: drm/i915: apply phase pointer override on SNB+ too
- Jesse Barnes: drm/i915: apply timing generator bug workaround on CPT and PPT
- Jesse Barnes: drm/i915: check for supported depth at fb init time
- Jesse Barnes: drm/i915: don’t set SDVO color range on ILK+
- Jesse Barnes: drm/i915: don’t set transcoder bpc on CougarPoint
- Jesse Barnes: drm/i915: don’t use uninitialized EDID bpc values when picking pipe bpp
- Jesse Barnes: drm/i915/dp: wait for previous AUX channel activity to clear
- Jesse Barnes: drm/i915: enable ring freq scaling, RC6 and graphics turbo on Ivy Bridge v3
- Jesse Barnes: drm/i915: fix CB tuning check for ILK+
- Jesse Barnes: drm/i915: flush plane control changes on ILK+ as well
- Jesse Barnes: drm/i915/hdmi: HDMI source product description infoframe support
- Jesse Barnes: drm/i915/hdmi: send AVI info frames on ILK+ as well
- Jesse Barnes: drm/i915/hdmi: split infoframe setting from infoframe type code
- Jesse Barnes: drm/i915: load a ring frequency scaling table v3
- Jesse Barnes: drm/i915: load the LUT before pipe enable on ILK+
- Jesse Barnes: drm/i915: provide more error output when mode sets fail
- Jesse Barnes: drm/i915: provide more error output when mode sets fail
- Jesse Barnes: drm/i915: set bpc for DP transcoder
- Jesse Barnes: drm/i915: set GFX_MODE to pre-Ivybridge default value even on Ivybridge
- Jesse Barnes: drm/i915: show interrupt info on IVB
- Jesse Barnes: drm/i915: split out Ironlake pipe bpp picking code
- Jesse Barnes: drm/i915: split out PCH refclk update code
- Jesse Barnes: drm/i915: split out plane update code
- Jesse Barnes: drm/i915: use pipe bpp in DP link bandwidth calculation
- Jesse Barnes: drm/i915: use pipe bpp in DP link bandwidth calculations
- Jesse Barnes: drm/i915: use pipe bpp when setting HDMI bpc
- Kamal Mostafa: i915: do not setup intel_backlight twice
- Keith Packard: drm/i915: Call intel_enable_plane from i9xx_crtc_mode_set (again)
- Keith Packard: drm/i915: Cannot set clock gating under UMS
- Keith Packard: drm/i915: Can’t do accurate vblank timestamps with UMS
- Keith Packard: drm/i915: DP_PIPE_ENABLED must check transcoder on CPT
- Keith Packard: drm/i915: Enable dither whenever display bpc < frame buffer bpc
- Keith Packard: drm/i915: Enable i915 frame buffer compression by default
- Keith Packard: drm/i915: FBC off for ironlake and older, otherwise on by default
- Keith Packard: drm/i915: Fix PCH port pipe select in CPT disable paths
- Keith Packard: drm/i915: Fixup for ‘Hold mode_config->mutex during hotplug’
- Keith Packard: drm/i915: Flush other plane register writes
- Keith Packard: drm/i915: Hold mode_config->mutex during hotplug processing
- Keith Packard: drm/i915: i915_gem_object_finish_gtt must always release gtt mmap
- Keith Packard: drm/i915: Ignore GPU wedged errors while pinning scanout buffers
- Keith Packard: drm/i915: In intel_dp_init, replace read of DPCD with intel_dp_get_dpcd
- Keith Packard: drm/i915: Initialize RCS ring status page address in intel_render_ring_init_dri
- Keith Packard: drm/i915: Leave LVDS registers unlocked
- Keith Packard: drm/i915: Remove unused ‘reg’ argument to dp_pipe_enabled
- Keith Packard: drm/i915: Rename i915_dp_detect_common to intel_dp_get_dpcd
- Keith Packard: drm/i915: Select correct pipe during TV detect
- Keith Packard: drm/i915: Set crtc DPMS mode to ON in intel_crtc_mode_set
- Keith Packard: drm/i915: Skip GPU wait for scanout pin while wedged
- Keith Packard: drm/i915: Try enabling RC6 by default (again)
- Keith Packard: drm/i915: TVDAC_STATE_CHG does not indicate successful load-detect
- Keith Packard: drm/i915: Use dp_detect_common in hotplug helper function
- Keith Packard: drm/i915: Wait for LVDS panel power sequence
- Keith Packard: Revert and fix “drm/i915/dp: remove DPMS mode tracking from DP”
- Keith Packard: Revert “drm/i915/dp: Zero the DPCD data before connection probe”
- Matthew Garrett: i915: Fix opregion notifications
- Matthew Garrett: Not all systems expose a firmware or platform mechanism for changing the backlight intensity on i915, so add native driver support.
- Michel Alexandre Salim: drm/i915: Add quirk to disable SSC on Sony Vaio Y2
- Pieterjan Camerlynck: i915: add Dell OptiPlex FX170 to intel_no_lvds
- Simon Farnsworth: drm/i915: Enable SDVO hotplug interrupts for HDMI and DVI
- Thomas Jarosch: drm/i915: Fix wrong initializer for “locked” variable in assert_panel_unlocked
If we count the final number of changes between the 3.0 and 3.1 versions, we come to the following results:
drivers/gpu/drm/i915/i915_debugfs.c | 232 +++++++-
drivers/gpu/drm/i915/i915_dma.c | 10 +-
drivers/gpu/drm/i915/i915_drv.c | 69 ++-
drivers/gpu/drm/i915/i915_drv.h | 51 +-
drivers/gpu/drm/i915/i915_gem.c | 193 +++++-
drivers/gpu/drm/i915/i915_gem_gtt.c | 39 +-
drivers/gpu/drm/i915/i915_irq.c | 22 +-
drivers/gpu/drm/i915/i915_reg.h | 59 ++-
drivers/gpu/drm/i915/i915_suspend.c | 13 +-
drivers/gpu/drm/i915/intel_bios.c | 140 +++--
drivers/gpu/drm/i915/intel_display.c | 1028 +++++++++++++++++++++++--------
drivers/gpu/drm/i915/intel_dp.c | 135 +++--
drivers/gpu/drm/i915/intel_drv.h | 38 +-
drivers/gpu/drm/i915/intel_hdmi.c | 166 +++++-
drivers/gpu/drm/i915/intel_lvds.c | 90 ++--
drivers/gpu/drm/i915/intel_opregion.c | 16 +-
drivers/gpu/drm/i915/intel_overlay.c | 6 +-
drivers/gpu/drm/i915/intel_panel.c | 76 +++-
drivers/gpu/drm/i915/intel_ringbuffer.c | 13 +-
drivers/gpu/drm/i915/intel_sdvo.c | 88 +--
drivers/gpu/drm/i915/intel_tv.c | 46 +-
21 files changed, 1879 insertions(+), 651 deletions(-)
So, in sum, there are changes all around the driver. Among the most interesting ones (in my humble opinion), are:
- Frame Buffer Compression is now enabled for Gen6 onwards (in other words, starting with Sandy Bridge). Of course, you can always enable it manually on your machine as well by using the i915.i915_enable_fbc=1 kernel parameter.
- FBC should work better in general, thanks to patches from Chris Wilson which disable it across page-flipping and before updating, persist framebuffer compression mode for Ironlake and Sandy Bridge, and also making a proper use of fences after CPU writes.
- RC6 was attempted to be enabled, but it was reverted early in the development cycle. As we had unusual time frame for this kernel release, by the time we have hit RC8, all the remaining RC6-related issues were tracked down. But as it was already too late for kernel 3.1, its enablement by default should happen in kernel 3.2. The usage of RC6 brings amazing power usage benefits, so you can enable it by yourself via the i915.i915_enable_rc6=1 kernel parameter – and letting us know about any non-covered issues it may bring.
- DCPD, or Display Port Configuration Data handling has received lots of attention, and in general one should have a much better support for Display Port outputs.
- configuration parameters for changing the cache level, maximum GPU frequency, cache sharing policy and GPU ring frequency scaling.
- additional debugging output when mode setting fails, information about interrupts on Ivy bridge, hangcheck disabling support and better DPCD hexdump.
- improvements for HDMI support, SDVO and LVDS handling, better pipe handling of EDID bpc values and proper panel fitting calculationsl
- usage of LLC mode (usage of CPU cache for GPU instructions) for Gen6. This one-lined (excluding comments
) change alone was responsible for about 20% performance improvements for openarena in full-screen mode, and about 12% improvements in nexuiz.
The i915 driver in kernel 3.1 received a total of 95 new patches when compared to 3.0 (excluding merges), coming from 14 different authors – both working at Intel and not. Now the road is open for 3.2. So fasten your seat belts and prepare for the next ride
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